clean up documentation, clean up dead code, add some instrs

This commit is contained in:
Redo
2024-07-20 22:35:33 -06:00
parent 7aa99412ba
commit 5f78ead08b
32 changed files with 185 additions and 3665 deletions

View File

@@ -1,3 +1,10 @@
instructionList.txt
List of all instructions in the 8608 architecture.
Instructions are encoded as the opcode, followed by any immediate values.
16-bit immediates are encoded in big-endian byte order.
Each instruction is described in order of: Mnemonic, Opcode, Clock cycles, Description
Control (C):
rst 00 1 Clear all registers and set I=0
@@ -45,16 +52,11 @@ ads b E8 1 S+=B signed
add imm8 24 2 A+=imm8, set flags
adb imm8 72 2 B+=imm8, set flags
adc imm8 73 2 C+=imm8, set flags
sub imm8 70 2 A-=imm8, set flags
sbb imm8 99 2 B-=imm8, set flags
sbc imm8 9A 2 C-=imm8, set flags
acc imm8 78 2 A+=imm8+CF, set flags
scc imm8 79 2 A-=imm8+CF, set flags
cmp imm8 71 2 set flags according to A-imm8
and imm8 74 2 A&=imm8, set zero flag
ior imm8 75 2 A|=imm8, set zero flag
xor imm8 76 2 A^=imm8, set zero flag
ann imm8 77 2 A&=~imm8, set zero flag
shl imm8 D0 2 A<<=imm8, set zero flag
shr imm8 D1 2 A>>=imm8, set zero flag
rol imm8 D2 2 A<<<=imm8, set zero flag
@@ -72,7 +74,6 @@ cmp *s+imm8 B0 3 set flags according to A-*(S+imm8)
and *s+imm8 B1 3 A&=*(S+imm8), set zero flag
ior *s+imm8 B2 3 A|=*(S+imm8), set zero flag
xor *s+imm8 B3 3 A^=*(S+imm8), set zero flag
ann *s+imm8 B4 3 A&=~*(S+imm8), set zero flag
shl *s+imm8 D5 3 A<<=*(S+imm8), set zero flag
shr *s+imm8 D6 3 A<<=*(S+imm8), set zero flag
rol *s+imm8 D7 3 A<<<=*(S+imm8), set zero flag
@@ -88,7 +89,6 @@ cmp b A2 1 set flags according to A-B
and b A3 1 A&=B, set zero flag
ior b A4 1 A|=B, set zero flag
xor b A5 1 A^=B, set zero flag
ann b A6 1 A&=~B, set zero flag
shl b DA 1 A<<=B, set zero flag
shr b DB 1 A>>=B, set zero flag
rol b DC 1 A<<<=B, set zero flag
@@ -104,7 +104,6 @@ cmp c A9 1 set flags according to A-C
and c AA 1 A&=C, set zero flag
ior c AB 1 A|=C, set zero flag
xor c AC 1 A^=C, set zero flag
ann c AD 1 A&=~C, set zero flag
shl c DF 1 A<<=C, set zero flag
shr c 4D 1 A>>=C, set zero flag
rol c 3E 1 A<<<=C, set zero flag
@@ -258,7 +257,7 @@ ldq p 8E 1 Q=P
lds p 8F 1 S=P
ldv p 90 1 V=P
Opcodes used: 252/255
Opcodes used: 244/255
0123456789ABCDEF
00 | CB----WWBBBBBBBB
10 | UUIIUIIUUUUUUUUU
@@ -267,11 +266,11 @@ Opcodes used: 252/255
40 | SSSSSSSSSSXXXAAA
50 | BBBBBBBBBBBBBBBB
60 | JBBJJJJJWWWWWWWW
70 | AAAAAAAAAAWWWWWW
70 | -AAAAAA-A-WWWWWW
80 | MMMMMMMMMMMMMMMM
90 | MMWWWWBBBAAAAAAA
A0 | AAAAAAAAAAAAAAAA
B0 | AAAAAAAAAAAAAAAA
90 | MMWWWWBBB--AAAAA
A0 | AAAAAA-AAAAAA-AA
B0 | AAAA-AAAAAAAAAAA
C0 | BBBBBBBBBBBBWWWW
D0 | AAAAAAAAAAAAAAAA
E0 | MJJJJJXXXSSBWWWW