update logic functions to remove metatable OOP
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@@ -15,28 +15,32 @@ datablock fxDTSBrickData(LogicGate_8bitDivider_Data)
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logicUIName = "8bit Divider";
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logicUIDesc = "Divides A by B";
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logicUpdate = "return function(gate) local a, b, n = 0, 0 " @
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"for i = 1, 8 do " @
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"local n = 2^(i-1) " @
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"a = a + bool_to_int[gate.ports[i].state] * n " @
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"b = b + bool_to_int[gate.ports[i+8].state] * n " @
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"end " @
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"if b ~= 0 then " @
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"local q = math.floor(a/b) " @
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"local r = a-q*b " @
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"for i = 1, 8 do " @
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"local n = 2^(i-1) " @
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"gate.ports[i+16]:setstate(bit.band(q, n) > 0) " @
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"gate.ports[i+24]:setstate(bit.band(r, n) > 0) " @
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"end " @
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"else " @
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"for i = 1, 8 do " @
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"gate.ports[i+16]:setstate(false) " @
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"gate.ports[i+24]:setstate(false) " @
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"end " @
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"end end";
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logicUpdate =
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"return function(gate) " @
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" local a, b, n = 0, 0 " @
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" for i = 1, 8 do " @
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" local n = 2^(i-1) " @
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" a = a + bool_to_int[Gate.getportstate(gate, i )] * n " @
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" b = b + bool_to_int[Gate.getportstate(gate, i+8)] * n " @
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" end " @
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" if b ~= 0 then " @
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" local q = math.floor(a/b) " @
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" local r = a-q*b " @
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" for i = 1, 8 do " @
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" local n = 2^(i-1) " @
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" Gate.setportstate(gate, i+16, bit.band(q, n) > 0) " @
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" Gate.setportstate(gate, i+24, bit.band(r, n) > 0) " @
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" end " @
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" else " @
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" for i = 1, 8 do " @
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" Gate.setportstate(gate, i+16, false) " @
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" Gate.setportstate(gate, i+24, false) " @
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" end " @
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" end " @
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"end"
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;
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numLogicPorts = 32;
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logicPortType[0] = 1;
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