add vertical bus bricks; delete redundant diode bricks
This commit is contained in:
Redo0
331
bricks/gen/newcode/Buffer 24 Bit Down.cs
Normal file
331
bricks/gen/newcode/Buffer 24 Bit Down.cs
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@@ -0,0 +1,331 @@
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datablock fxDtsBrickData(Buffer24BitDown){
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brickFile = $LuaLogic::Path @ "bricks/gen/newbricks/Buffer 24 Bit Down.blb";
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iconName = $LuaLogic::Path @ "bricks/gen/newicons/Buffer 24 Bit Down";
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category = "Logic Bricks";
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subCategory = "Bus";
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uiName = "Buffer 24 Bit Down";
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logicUIName = "Buffer 24 Bit Down";
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logicUIDesc = "";
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hasPrint = 1;
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printAspectRatio = "Logic";
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logicBrickSize = "24 1 1";
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orientationFix = 3;
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isLogic = true;
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isLogicGate = true;
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isLogicInput = false;
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logicInit = "";
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logicInput = "";
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logicUpdate =
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"return function(gate) " @
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" if Gate.getportstate(gate, 49) then " @
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" Gate.setportstate(gate, 25, Gate.getportstate(gate, 1)) " @
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" Gate.setportstate(gate, 26, Gate.getportstate(gate, 2)) " @
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" Gate.setportstate(gate, 27, Gate.getportstate(gate, 3)) " @
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" Gate.setportstate(gate, 28, Gate.getportstate(gate, 4)) " @
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" Gate.setportstate(gate, 29, Gate.getportstate(gate, 5)) " @
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" Gate.setportstate(gate, 30, Gate.getportstate(gate, 6)) " @
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" Gate.setportstate(gate, 31, Gate.getportstate(gate, 7)) " @
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" Gate.setportstate(gate, 32, Gate.getportstate(gate, 8)) " @
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" Gate.setportstate(gate, 33, Gate.getportstate(gate, 9)) " @
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" Gate.setportstate(gate, 34, Gate.getportstate(gate, 10)) " @
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" Gate.setportstate(gate, 35, Gate.getportstate(gate, 11)) " @
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" Gate.setportstate(gate, 36, Gate.getportstate(gate, 12)) " @
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" Gate.setportstate(gate, 37, Gate.getportstate(gate, 13)) " @
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" Gate.setportstate(gate, 38, Gate.getportstate(gate, 14)) " @
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" Gate.setportstate(gate, 39, Gate.getportstate(gate, 15)) " @
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" Gate.setportstate(gate, 40, Gate.getportstate(gate, 16)) " @
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" Gate.setportstate(gate, 41, Gate.getportstate(gate, 17)) " @
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" Gate.setportstate(gate, 42, Gate.getportstate(gate, 18)) " @
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" Gate.setportstate(gate, 43, Gate.getportstate(gate, 19)) " @
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" Gate.setportstate(gate, 44, Gate.getportstate(gate, 20)) " @
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" Gate.setportstate(gate, 45, Gate.getportstate(gate, 21)) " @
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" Gate.setportstate(gate, 46, Gate.getportstate(gate, 22)) " @
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" Gate.setportstate(gate, 47, Gate.getportstate(gate, 23)) " @
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" Gate.setportstate(gate, 48, Gate.getportstate(gate, 24)) " @
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" else " @
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" Gate.setportstate(gate, 25, false) " @
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" Gate.setportstate(gate, 26, false) " @
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" Gate.setportstate(gate, 27, false) " @
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" Gate.setportstate(gate, 28, false) " @
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" Gate.setportstate(gate, 29, false) " @
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" Gate.setportstate(gate, 30, false) " @
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" Gate.setportstate(gate, 31, false) " @
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" Gate.setportstate(gate, 32, false) " @
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" Gate.setportstate(gate, 33, false) " @
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" Gate.setportstate(gate, 34, false) " @
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" Gate.setportstate(gate, 35, false) " @
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" Gate.setportstate(gate, 36, false) " @
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" Gate.setportstate(gate, 37, false) " @
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" Gate.setportstate(gate, 38, false) " @
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" Gate.setportstate(gate, 39, false) " @
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" Gate.setportstate(gate, 40, false) " @
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" Gate.setportstate(gate, 41, false) " @
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" Gate.setportstate(gate, 42, false) " @
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" Gate.setportstate(gate, 43, false) " @
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" Gate.setportstate(gate, 44, false) " @
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" Gate.setportstate(gate, 45, false) " @
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" Gate.setportstate(gate, 46, false) " @
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" Gate.setportstate(gate, 47, false) " @
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" Gate.setportstate(gate, 48, false) " @
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" end " @
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"end"
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;
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logicGlobal = "";
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numLogicPorts = 49;
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logicPortType[0] = 1;
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logicPortPos[0] = "23 0 0";
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logicPortDir[0] = 4;
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logicPortUIName[0] = "In0";
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logicPortType[1] = 1;
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logicPortPos[1] = "21 0 0";
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logicPortDir[1] = 4;
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logicPortUIName[1] = "In1";
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logicPortType[2] = 1;
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logicPortPos[2] = "19 0 0";
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logicPortDir[2] = 4;
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logicPortUIName[2] = "In2";
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logicPortType[3] = 1;
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logicPortPos[3] = "17 0 0";
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logicPortDir[3] = 4;
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logicPortUIName[3] = "In3";
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logicPortType[4] = 1;
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logicPortPos[4] = "15 0 0";
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logicPortDir[4] = 4;
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logicPortUIName[4] = "In4";
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logicPortType[5] = 1;
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logicPortPos[5] = "13 0 0";
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logicPortDir[5] = 4;
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logicPortUIName[5] = "In5";
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logicPortType[6] = 1;
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logicPortPos[6] = "11 0 0";
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logicPortDir[6] = 4;
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logicPortUIName[6] = "In6";
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logicPortType[7] = 1;
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logicPortPos[7] = "9 0 0";
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logicPortDir[7] = 4;
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logicPortUIName[7] = "In7";
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logicPortType[8] = 1;
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logicPortPos[8] = "7 0 0";
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logicPortDir[8] = 4;
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logicPortUIName[8] = "In8";
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logicPortType[9] = 1;
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logicPortPos[9] = "5 0 0";
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logicPortDir[9] = 4;
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logicPortUIName[9] = "In9";
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logicPortType[10] = 1;
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logicPortPos[10] = "3 0 0";
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logicPortDir[10] = 4;
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logicPortUIName[10] = "In10";
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logicPortType[11] = 1;
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logicPortPos[11] = "1 0 0";
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logicPortDir[11] = 4;
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logicPortUIName[11] = "In11";
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logicPortType[12] = 1;
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logicPortPos[12] = "-1 0 0";
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logicPortDir[12] = 4;
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logicPortUIName[12] = "In12";
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logicPortType[13] = 1;
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logicPortPos[13] = "-3 0 0";
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logicPortDir[13] = 4;
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logicPortUIName[13] = "In13";
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logicPortType[14] = 1;
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logicPortPos[14] = "-5 0 0";
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logicPortDir[14] = 4;
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logicPortUIName[14] = "In14";
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logicPortType[15] = 1;
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logicPortPos[15] = "-7 0 0";
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logicPortDir[15] = 4;
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logicPortUIName[15] = "In15";
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logicPortType[16] = 1;
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logicPortPos[16] = "-9 0 0";
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logicPortDir[16] = 4;
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logicPortUIName[16] = "In16";
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logicPortType[17] = 1;
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logicPortPos[17] = "-11 0 0";
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logicPortDir[17] = 4;
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logicPortUIName[17] = "In17";
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logicPortType[18] = 1;
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logicPortPos[18] = "-13 0 0";
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logicPortDir[18] = 4;
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logicPortUIName[18] = "In18";
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logicPortType[19] = 1;
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logicPortPos[19] = "-15 0 0";
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logicPortDir[19] = 4;
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logicPortUIName[19] = "In19";
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logicPortType[20] = 1;
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logicPortPos[20] = "-17 0 0";
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logicPortDir[20] = 4;
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logicPortUIName[20] = "In20";
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logicPortType[21] = 1;
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logicPortPos[21] = "-19 0 0";
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logicPortDir[21] = 4;
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logicPortUIName[21] = "In21";
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logicPortType[22] = 1;
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logicPortPos[22] = "-21 0 0";
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logicPortDir[22] = 4;
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logicPortUIName[22] = "In22";
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logicPortType[23] = 1;
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logicPortPos[23] = "-23 0 0";
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logicPortDir[23] = 4;
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logicPortUIName[23] = "In23";
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logicPortType[24] = 0;
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logicPortPos[24] = "23 0 0";
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logicPortDir[24] = 5;
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logicPortUIName[24] = "Out0";
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logicPortType[25] = 0;
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logicPortPos[25] = "21 0 0";
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logicPortDir[25] = 5;
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logicPortUIName[25] = "Out1";
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logicPortType[26] = 0;
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logicPortPos[26] = "19 0 0";
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logicPortDir[26] = 5;
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logicPortUIName[26] = "Out2";
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logicPortType[27] = 0;
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logicPortPos[27] = "17 0 0";
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logicPortDir[27] = 5;
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logicPortUIName[27] = "Out3";
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logicPortType[28] = 0;
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logicPortPos[28] = "15 0 0";
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logicPortDir[28] = 5;
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logicPortUIName[28] = "Out4";
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logicPortType[29] = 0;
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logicPortPos[29] = "13 0 0";
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logicPortDir[29] = 5;
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logicPortUIName[29] = "Out5";
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logicPortType[30] = 0;
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logicPortPos[30] = "11 0 0";
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logicPortDir[30] = 5;
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logicPortUIName[30] = "Out6";
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logicPortType[31] = 0;
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logicPortPos[31] = "9 0 0";
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logicPortDir[31] = 5;
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logicPortUIName[31] = "Out7";
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logicPortType[32] = 0;
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logicPortPos[32] = "7 0 0";
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logicPortDir[32] = 5;
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logicPortUIName[32] = "Out8";
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logicPortType[33] = 0;
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logicPortPos[33] = "5 0 0";
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logicPortDir[33] = 5;
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logicPortUIName[33] = "Out9";
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logicPortType[34] = 0;
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logicPortPos[34] = "3 0 0";
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logicPortDir[34] = 5;
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logicPortUIName[34] = "Out10";
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logicPortType[35] = 0;
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logicPortPos[35] = "1 0 0";
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logicPortDir[35] = 5;
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logicPortUIName[35] = "Out11";
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logicPortType[36] = 0;
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logicPortPos[36] = "-1 0 0";
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logicPortDir[36] = 5;
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logicPortUIName[36] = "Out12";
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logicPortType[37] = 0;
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logicPortPos[37] = "-3 0 0";
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logicPortDir[37] = 5;
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logicPortUIName[37] = "Out13";
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logicPortType[38] = 0;
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logicPortPos[38] = "-5 0 0";
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logicPortDir[38] = 5;
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logicPortUIName[38] = "Out14";
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logicPortType[39] = 0;
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logicPortPos[39] = "-7 0 0";
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logicPortDir[39] = 5;
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logicPortUIName[39] = "Out15";
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logicPortType[40] = 0;
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logicPortPos[40] = "-9 0 0";
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logicPortDir[40] = 5;
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logicPortUIName[40] = "Out16";
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logicPortType[41] = 0;
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logicPortPos[41] = "-11 0 0";
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logicPortDir[41] = 5;
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logicPortUIName[41] = "Out17";
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logicPortType[42] = 0;
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logicPortPos[42] = "-13 0 0";
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logicPortDir[42] = 5;
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logicPortUIName[42] = "Out18";
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logicPortType[43] = 0;
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logicPortPos[43] = "-15 0 0";
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logicPortDir[43] = 5;
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logicPortUIName[43] = "Out19";
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logicPortType[44] = 0;
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logicPortPos[44] = "-17 0 0";
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logicPortDir[44] = 5;
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logicPortUIName[44] = "Out20";
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logicPortType[45] = 0;
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logicPortPos[45] = "-19 0 0";
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logicPortDir[45] = 5;
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logicPortUIName[45] = "Out21";
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logicPortType[46] = 0;
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logicPortPos[46] = "-21 0 0";
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logicPortDir[46] = 5;
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logicPortUIName[46] = "Out22";
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logicPortType[47] = 0;
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logicPortPos[47] = "-23 0 0";
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logicPortDir[47] = 5;
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logicPortUIName[47] = "Out23";
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logicPortType[48] = 1;
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logicPortPos[48] = "23 0 0";
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logicPortDir[48] = 2;
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logicPortUIName[48] = "Clock";
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logicPortCauseUpdate[48] = true;
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};
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