make sim local; start circuit compiler

This commit is contained in:
Redo0
2021-05-25 05:26:06 -05:00
parent 569e79ab96
commit 0963ef8ca8
4 changed files with 51 additions and 9 deletions

View File

@@ -10,6 +10,7 @@ OPT_SAVE_DIR = OPT_SAVE_DIR:gsub("/$", "")
print("Save location set to \""..OPT_SAVE_DIR.."\"")
local socket = require("socket")
local ffi = require("ffi")
dofile("iosafe.lua")
@@ -21,7 +22,9 @@ dofile("gatedef.lua")
dofile("gate.lua")
dofile("port.lua")
dofile("save.lua")
FFI = ffi
dofile("compile.lua")
FFI = nil
OPT_TICK_ENABLED = true
OPT_TICK_TIME = 0.032
@@ -145,7 +148,7 @@ while 1 do
local max = vectotable(data[i+4])
local bounds = {min[1], min[2], min[3], max[1], max[2], max[3]}
local wire = Wire.new(Wire, tonumber(data[i+1]), tonumber(data[i+2]), bounds)
local wire = Wire.new(Wire, tonumber(data[i+1]), tonumber(data[i+2]), bounds, sim)
Simulation.addwire(sim, wire)
i = i + 4